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High
performance flip chip devices usually require single-ended and/or
differential pairs transmission lines with tight control over impedance.
When the flip chip device I/O count increases and/or its pitch becomes
smaller, the substrate lines and spaces have to be decreased accordingly. However, decreasing
the line width requires a reduction in the dielectric
Z-spacing to its ground reference, and/or
reduction in the dielectric constant value of the
insulating material. Further more, without lowering the dielectric
constant
values of the insulating material between
lines, cross-talk may cause unacceptable signal
attenuation in narrowed lines. AMITEC
uses a low K (2.55)
insulating material in the thin film section of the core-less substrate, enabling < 20µm
lines and
spaces with 50ohm impedance values and
acceptable attenuation over high frequency range. |
