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In
AMITEC's substrate, the micro-vias, electrically connecting
the build-up layers in the z-axis,are metal filled. The
manufacturing technology used to create these micro-vias, involves metal
pillar formations followed by
dielectric coating and polishing steps to expose the pillars top
surfaces. Following,
another build-up metal layer can be formed on top of each
exposed pillar (via) surface allowing electrical contact as designed.This patented interconnect technology
allows parallel formation of hundreds of thousands of vias per substrate
with minimum via diameter of 10µm. Since all vias are filled and planarized,
they can also be structured one on
top of another. Due to the smaller area required for
stacked via structure, greater wiring densities can be achieved. Additionally,
the power paths associated with the stacked
vias are less inductive, and therefore are able
to support increased switching activities. Also the voltage drop for
each stacked via structure is reduced, providing a better power
and ground connection to the chip assembled over the
substrate. |
