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The
evolution towards higher performance chips with
increased transistor count demands improved power and heat
dissipation requirements. AMITEC core-less substrate in
FCBGA package format,is addressing this challenge by creating so called “Vertical Power Paths”
(VPPs) through the entire substrate thickness (Z-axis). The
thin film section in the AMITEC core-less substrate
contains large amount of filled metal micro-vias that
are redundantly
distributed
and vertically stacked to meet device
pitch on one hand, and high current
flow requirements on the other. When high current flows from the chip through
the micro-vias, it will eventually hit
the heavy Copper planes or bus
lines in the thick film section of the
core-less substrate. In this section, large diameter and stacked
Copper pillars will further distribute the current outside the
package. Needless to say, this path will also work the other way around, where high
current is flowing into the
low count yet large diameter Copper pillars and then distribute
to the thin film section by large amount yet small diameter filled micro-vias. |
